Extended Data Fig. 4: 4 basic neuron operations that enable MVM with multi-bit inputs and outputs.
From: A compute-in-memory chip based on resistive random-access memory

a, Initialization, precharge sampling capacitor Csample and output wires (SLs), and discharge integration capacitor Cinteg. b, Sampling and integration, sample SL voltage onto Csample, followed by integrating the charge onto Cinteg. c, Comparison and readout. The amplifier is turned into comparator mode to determine the polarity of the integrated voltage. Comparator outputs are written out of the neuron through the outer feedback loop. d, Charge decrement, charge is added or subtracted on Cinteg through the outer feedback loop, depending on value stored in the latch.