Figure 3 | Scientific Reports

Figure 3

From: Cryogenic Memory Architecture Integrating Spin Hall Effect based Magnetic Memory and Superconductive Cryotron Devices

Figure 3

Characterisation of a standalone hTron device. (a) Voltage drops (right axis) over the hTron gate and channel as functions of applied currents (left axis). Switching occurs at \({I}_{G}^{c}\) = 87 μA. (b) Distribution of the gate critical current obtained by repeating the bias sequence in panel (a) 100 times, and its cumulative probability of switching to the normal state (right axis). (c) Probabilities for the gate (left) and channel (right) of switching to the normal state as functions of applied gate and channel currents.

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