Figure 7
From: Stacked SiGe nanosheets p-FET for Sub-3 nm logic applications

(a) ID–VGS and (b) ID–VDS curves for the two stacked SiGe nanosheet p-GAAFET with a gate length of 90 nm.
From: Stacked SiGe nanosheets p-FET for Sub-3 nm logic applications
(a) ID–VGS and (b) ID–VDS curves for the two stacked SiGe nanosheet p-GAAFET with a gate length of 90 nm.