Fig. 1: Electrical characterizations of vapour-deposited CsSnI3-based TFTs.
From: Vapour-deposited high-performance tin perovskite transistors
a–c, Fabrication of bottom-gate, top-contact vapour-deposited CsSnI3-based TFT. Sequential evaporation of perovskite compounds (a), post annealing treatment of the perovskite multilayers (b) and evaporation of Au electrodes (c). d, Field-effect mobility and on/off current ratio as a function of PbCl2 atomic ratio. The average (centre) and standard deviations (error bars) were obtained from sample size n = 10. e, Transfer characteristics of CsSnI3 TFTs and optimized CsSnI3:PbCl2 TFTs (Cs1.3SnPb0.2I3Cl0.15). IG indicates gate leakage current. Channel length/width = 100 µm/200 µm (VDS = −40 V). f, Output characteristics of optimized CsSnI3:PbCl2 TFTs. g, Consecutive forward scans of transfer characteristics for 100 cycles (VDS = −40 V). h, Negative bias-stress measurements for CsSnI3 and CsSnI3:PbCl2 TFTs (VDS = VGS = −40 V) for 2,000 s. i, Benchmark of representative µFE and Ion/Ioff values of reported vapour-deposited perovskite TFTs based on different channel materials.
