Fig. 3
From: ZnO composite nanolayer with mobility edge quantization for multi-value logic transistors
A ternary transistor with double zinc oxide (ZnO) composite nanolayers. a Schematic of the structure of the ternary transistor. b Energy band diagram of the ternary transistor at the grounded state (VG = 0). c Transfer characteristics of the ternary transistor at VD = 1 V. d Measured and simulated transfer characteristics of the ternary transistor at VD = 1 V. e Output (ID–VD) characteristics of the ternary transistor at various VG values. f–h Idealized representation of energy band diagrams from the source to the gate in the ternary transistor. Band diagrams matched to Region I (f), Region II (g), and Region III (h), as denoted in Fig. 3c, respectively. i Voltage transfer characteristics of the ternary inverter fabricated using the ternary transistor. The inset shows a circuit schematic of the ternary inverter. j Butterfly voltage transfer characteristics for static noise margin. k Transient responses of ternary transistor based NMIN and NMAX gates
