Fig. 3: Polarization-driven resistive switching.
From: A ferroelectric fin diode for robust non-volatile memory
a The quasi-static current versus voltage (I–V) curve in a typical FFD. b The temperature-dependence of the dielectric permittivity. c The polarization versus voltage (P-V) curves at a frequency of 100 Hz and quasi-static I–V curves of the FFD at the same temperatures of 300 K, 333 K, 353 K, 373 K, 393 K and back to 300 K, respectively. d ln(J/T2) versus 1/T plots at the voltage bias of 5 V. The linear fit gives a Schottky barrier height of ~0.85 eV. Inset: ln(J/T2) versus V1/2 plots at temperature of 333 K, 343 K, 353 K, 363 K, 373 K, respectively. e The schematic diagram of the electronic band structure of Pt electrode, ZnO semiconductor and Al electrode. f–k The TCAD-obtained energy band alignment of Pt/ZnO/Al structure after poling by a 20 V bias (f) and −20 V bias (i). The TCAD-obtained distribution of electric potential in the FFD under poling of 20 V bias (g) and −20 V bias (j). The scheme of polarization vectors alignment in the FFD after poling by 20 V bias (h) and −20 V bias (k).
