Figure 1 | Scientific Reports

Figure 1

From: Cryogenic Memory Architecture Integrating Spin Hall Effect based Magnetic Memory and Superconductive Cryotron Devices

Figure 1

Proposed cryogenic memory architecture. Not-to-scale illustrations of (a) a SHE-MTJ device, (b) a hTron device and (c) a memory cell. (d) Schematic of the 4 × 4 memory array interfaced with external control circuitries by column and row drivers. The arrows indicate the current paths during the writing process of cell (2,2). (e) Micrograph of the memory array. (f) SEM image of cell (2,2) in the array.

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