Fig. 1: Latency comparison and principle of the heuristic recurrent algorithm.
From: An integrated large-scale photonic accelerator with ultralow latency
a, Comparison of latency between oMAC and TPU systolic array, a typical enhanced MAC operation. In the TPU, we assume that the clock frequency is 700 MHz (TPU v1)36 and the latency accumulates by orders of magnitude with the increase of clock cycles and matrix size linearly. By contrast, the latency only increases linearly with the expanding matrix size in oMAC owing to the change of path length, limited to nanoseconds. b, Principle of the heuristic recurrent algorithm for oMAC. St denotes the current data vector and W denotes the weight module representing the transition probability.
