Fig. 3: Phase-locking provides a correction to small external perturbations.
From: An oscillatory mechanism for multi-level storage in short-term memory
a Model schematic as in Fig. 2c. b A small input perturbation (+ or − pulse) causes a transient phase shift (red, phase advance; orange, phase delay) during the supra-threshold portion of the oscillatory cycle that is subsequently reset during the sub-threshold portion of the cycle. Simulation shown for the conductance-based autapse model depicted in (a). c Simulations with synaptic feedback activation held constant at two different levels (cyan and magenta points). For each synaptic feedback level, the corresponding voltage traces have the same number of spikes per cycle.
